1. Technical Field of the Invention
The invention relates generally to configuring processing modules within a hard disk drive (HDD); and, more particularly, it relates to configuring processing modules within a HDD using format field elements.
2. Description of Related Art
As is known, many varieties of memory storage devices (e.g. hard disk drives (HDDs)), such as magnetic disk drives are used to provide data storage for a host device, either directly, or through a network such as a storage area network (SAN) or network attached storage (NAS). Such a memory storage system (e.g., a HDD) can itself be viewed as a communication system in which information is encoded and provided via a communication channel to a storage media; the reverse direction of communication is also performed in a HDD in which data is read from the media and passed through the communication channel (e.g., sometimes referred to as a read channel in the HDD context) at which point it is decoded to makes estimates of the information that is read.
Typical host devices include stand alone computer systems such as a desktop or laptop computer, enterprise storage devices such as servers, storage arrays such as a redundant array of independent disks (RAID) arrays, storage routers, storage switches and storage directors, and other consumer devices such as video game systems and digital video recorders. These devices provide high storage capacity in a cost effective manner.
Within such HDDs, there are generally a large number of various processing modules therein that need to operate in concert with one another to ensure appropriate formatting of data going to and from the storage media of the HDD.
Some prior art approaches employ a complex sequencer to perform these functions. For example, to try to achieve some degree of flexibility and control into the formatting system, it is usually required that a complex sequencer be used to effectuate all of the appropriate operations of the various modules within the formatting system. Such a system includes a relatively complex instruction set with a substantial writable control store and a mechanism that allows it to branch and possibly perform nested looping. Additionally, such a system requires its own independent firmware development (which can be costly and introduce significant delays into the design process). Moreover, this prior art approach is inherently inflexible, in that, a dedicated sequencer is employed for a particular application. If the operations or needs of the system change, then an entire re-doing/re-designing of this relatively highly complex sequencer must be performed.